FSP Configuration
  Board "Custom User Board (Any Device)"
  R7FA2L1AB2DFL
    part_number: R7FA2L1AB2DFL
    rom_size_bytes: 262144
    ram_size_bytes: 32768
    data_flash_size_bytes: 8192
    package_style: LQFP
    package_pins: 48
    
  RA2L1
    series: 2
    
  RA2L1 Family
    Enable inline BSP IRQ functions: Disabled
    OFS0 register settings: Independent WDT: Start Mode: IWDT is stopped after a reset
    OFS0 register settings: Independent WDT: Timeout Period: 2048 cycles
    OFS0 register settings: Independent WDT: Dedicated Clock Frequency Divisor: 128
    OFS0 register settings: Independent WDT: Window End Position:  0% (no window end position)
    OFS0 register settings: Independent WDT: Window Start Position: 100% (no window start position)
    OFS0 register settings: Independent WDT: Reset Interrupt Request Select: Reset is enabled
    OFS0 register settings: Independent WDT: Stop Control: Stop counting when in Sleep, Snooze mode, or Software Standby
    OFS0 register settings: WDT: Start Mode Select: Stop WDT after a reset (register-start mode)
    OFS0 register settings: WDT: Timeout Period: 16384 cycles
    OFS0 register settings: WDT: Clock Frequency Division Ratio: 128
    OFS0 register settings: WDT: Window End Position:  0% (no window end position)
    OFS0 register settings: WDT: Window Start Position: 100% (no window start position)
    OFS0 register settings: WDT: Reset Interrupt Request: Reset
    OFS0 register settings: WDT: Stop Control: Stop counting when entering Sleep mode
    OFS1 register settings: Internal Clock Supply Architecture Type: Type A
    OFS1 register settings: Voltage Detection 0 Circuit Start: Voltage monitor 0 reset is disabled after reset
    OFS1 register settings: Voltage Detection 0 Level: 1.90 V
    OFS1 register settings: HOCO Oscillation Enable: HOCO oscillation is enabled after reset
    Use Low Voltage Mode: Not Supported
    MPU: Enable or disable PC Region 0: Disabled
    MPU: PC0 Start: 0x000FFFFC
    MPU: PC0 End: 0x000FFFFF
    MPU: Enable or disable PC Region 1: Disabled
    MPU: PC1 Start: 0x000FFFFC
    MPU: PC1 End: 0x000FFFFF
    MPU: Enable or disable Memory Region 0: Disabled
    MPU: Memory Region 0 Start: 0x000FFFFC
    MPU: Memory Region 0 End: 0x000FFFFF
    MPU: Enable or disable Memory Region 1: Disabled
    MPU: Memory Region 1 Start: 0x200FFFFC
    MPU: Memory Region 1 End: 0x200FFFFF
    MPU: Enable or disable Memory Region 2: Disabled
    MPU: Memory Region 2 Start: 0x407FFFFC
    MPU: Memory Region 2 End: 0x407FFFFF
    MPU: Enable or disable Memory Region 3: Disabled
    MPU: Memory Region 3 Start: 0x400DFFFC
    MPU: Memory Region 3 End: 0x400DFFFF
    Power: DC-DC Regulator: Disabled
    Power: DC-DC Supply Range: 2.7V to 3.6V
    Main Oscillator Wait Time: 262144 cycles
    ID Code Mode: Unlocked (Ignore ID)
    ID Code (32 Hex Characters): FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
    Fill Flash Gap: Do not fill gap
    
  RA2L1 event data
  RA Common
    Main stack size (bytes): 0x400
    Heap size (bytes): 0x1000
    MCU Vcc (mV): 3300
    Parameter checking: Disabled
    Assert Failures: Return FSP_ERR_ASSERTION
    Error Log: No Error Log
    Clock Registers not Reset Values during Startup: Disabled
    Main Oscillator Populated: Populated
    PFS Protect: Enabled
    C Runtime Initialization : Enabled
    Early BSP Initialization : Disabled
    Main Oscillator Clock Source: Crystal or Resonator
    Subclock Populated: Populated
    Subclock Drive (Drive capacitance availability varies by MCU): Standard/Normal mode
    Subclock Stabilization Time (ms): 1000
    
  Clocks
    XTAL 20000000Hz
    HOCO 48MHz
    Clock Src: HOCO
    ICLK Div /1
    PCLKB Div /2
    PCLKD Div /1
    CLKOUT Disabled
    CLKOUT Div /1
    
  Pin Configurations
    R7FA2L1AB2DFL.pincfg -> g_bsp_pin_cfg
      AVCC0 42 ANALOG0_AVCC0 - - - - - - - - IO "Read only" - 
      AVSS0 43 ANALOG0_AVSS0 - - - - - - - - IO "Read only" - 
      P000 48 - - - - Disabled - - "ADC0: AN000; CTSU0: TS21; ICU0: IRQ06" - None - - 
      P001 47 - - - - Disabled - - "ADC0: AN001; CTSU0: TS22; ICU0: IRQ07" - None - - 
      P002 46 - - - - Disabled - - "ADC0: AN002; CTSU0: TS23; ICU0: IRQ02" - None - - 
      P010 45 - - - - Disabled - - "ADC0: AN005; ANALOG0: VREFH0; CTSU0: TS30-CFC" - None - - 
      P011 44 - - - - Disabled - - "ADC0: AN006; ANALOG0: VREFL0; CTSU0: TS31-CFC" - None - - 
      P012 41 - - - - Disabled - - "ADC0: AN007; CTSU0: TS32-CFC" - None - - 
      P013 40 - - - - Disabled - - "ADC0: AN008; CTSU0: TS33-CFC" - None - - 
      P014 39 - - - - Disabled - - "ADC0: AN009; DAC0: DA0" - None - - 
      P015 38 - - - - Disabled - - "ADC0: AN010; CTSU0: TS28-CFC; ICU0: IRQ07" - None - - 
      P100 36 - - - - Disabled - - "ACMPLP0: CMPIN0; AGT0: AGTIO0; CTSU0: TS26-CFC; GPT_POEG0: GTETRGA; GPT5: GTIOC5B; ICU0: IRQ02; IIC1: SCL1; KINT0: KRM00; SCI0: RXD0; SCI0: SCL0; SCI1: SCK1; SPI0: MISOA" - None - - 
      P101 35 - - - - Disabled - - "ACMPLP0: CMPREF0; AGT0: AGTEE0; CTSU0: TS16-CFC; GPT_POEG1: GTETRGB; GPT5: GTIOC5A; ICU0: IRQ01; IIC1: SDA1; KINT0: KRM01; SCI0: SDA0; SCI0: TXD0; SCI1: CTS1; SPI0: MOSIA" - None - - 
      P102 34 - - - - Disabled - - "ACMPLP1: CMPIN1; ADC0: ADTRG0; AGT0: AGTO0; CAN0: CRX0; CTSU0: TS15-CFC; GPT_OPS0: GTOWLO; GPT2: GTIOC2B; KINT0: KRM02; SCI0: SCK0; SCI2: SDA2; SCI2: TXD2; SPI0: RSPCKA" - None - - 
      P103 33 - - - - Disabled - - "ACMPLP1: CMPREF1; CAN0: CTX0; CTSU0: TS14-CFC; GPT_OPS0: GTOWUP; GPT2: GTIOC2A; KINT0: KRM03; SCI0: CTS0; SPI0: SSLA0" - None - - 
      P104 32 - - - - Disabled - - "CTSU0: TS13-CFC; GPT_POEG1: GTETRGB; GPT1: GTIOC1B; ICU0: IRQ01; KINT0: KRM04; SCI0: RXD0; SCI0: SCL0; SPI0: SSLA1" - None - - 
      P108 25 DEBUG0_SWDIO - - - "Peripheral mode" - None "DEBUG0: SWDIO; GPT_OPS0: GTOULO; GPT0: GTIOC0B; SCI9: CTS9; SPI1: SSLB0" - IO - - 
      P109 26 SCI9_TXD9 - - - "Peripheral mode" CMOS None "CAN0: CTX0; CGC0: CLKOUT; CTSU0: TS10-CFC; GPT_OPS0: GTOVUP; GPT1: GTIOC1A; SCI1: SCK1; SCI9: SDA9; SCI9: TXD9; SPI1: MOSIB" - IO - - 
      P110 27 SCI9_RXD9 - - None "Peripheral mode" CMOS None "ACMP(0-1): VCOUT; CAN0: CRX0; CTSU0: TS11-CFC; GPT_OPS0: GTOVLO; GPT1: GTIOC1B; ICU0: IRQ03; SCI2: CTS2; SCI9: RXD9; SCI9: SCL9; SPI1: MISOB" - IO - - 
      P111 28 - - - - Disabled - - "AGT0: AGTOA0; CTSU0: TS12-CFC; GPT3: GTIOC3A; ICU0: IRQ04; SCI2: SCK2; SCI9: SCK9; SPI1: RSPCKB" - None - - 
      P112 29 - - - - Disabled - - "AGT0: AGTOB0; CTSU0: TSCAP; GPT3: GTIOC3B; SCI1: SCK1; SCI2: SDA2; SCI2: TXD2; SPI1: SSLB0" - None - - 
      P200 21 - - - - Disabled - - "ICU0: NMI" - None - - 
      P201 20 - - - - Disabled - - "SYSTEM0: MD" - None - - 
      P206 18 - - - - Disabled - - "GPT_OPS0: GTIU; ICU0: IRQ00; IIC1: SDA1; SCI0: RXD0; SCI0: SCL0; SPI1: SSLB1" - None - - 
      P207 17 - - - - Disabled - - - - None - - 
      P208 16 - - - - Disabled - - "AGT0: AGTOB0" - None - - 
      P212 8 - - - - Disabled - - "AGT1: AGTEE1; CGC0: EXTAL; GPT_POEG1: GTETRGB; GPT0: GTIOC0B; ICU0: IRQ03; SCI1: RXD1; SCI1: SCL1" - None - - 
      P213 7 - - - - Disabled - - "CGC0: XTAL; GPT_POEG0: GTETRGA; GPT0: GTIOC0A; ICU0: IRQ02; SCI1: SDA1; SCI1: TXD1" - None - - 
      P214 5 - - - - Disabled - - "CGC0: XCOUT" - None - - 
      P215 4 - - - - Disabled - - "CGC0: XCIN" - None - - 
      P300 24 DEBUG0_SWCLK - - - "Peripheral mode" - None "DEBUG0: SWCLK; GPT_OPS0: GTOUUP; GPT0: GTIOC0A; SPI1: SSLB1" - IO - - 
      P301 23 - - - - Disabled - - "AGT0: AGTIO0; CTSU0: TS09-CFC; GPT_OPS0: GTOULO; GPT4: GTIOC4B; ICU0: IRQ06; SCI2: RXD2; SCI2: SCL2; SCI9: CTS9; SPI1: SSLB2" - None - - 
      P302 22 - - - - Disabled - - "CTSU0: TS08-CFC; GPT_OPS0: GTOUUP; GPT4: GTIOC4A; ICU0: IRQ05; SCI2: SDA2; SCI2: TXD2; SPI1: SSLB3" - None - - 
      P400 1 - - - - Disabled - - "AGT1: AGTIO1; CAC0: CACREF; GPT6: GTIOC6A; ICU0: IRQ00; IIC0: SCL0; SCI0: SCK0; SCI1: SCK1" - None - - 
      P401 2 - - - - Disabled - - "CAN0: CTX0; GPT_POEG0: GTETRGA; GPT6: GTIOC6B; ICU0: IRQ05; IIC0: SDA0; SCI0: CTS0; SCI1: SDA1; SCI1: TXD1" - None - - 
      P407 12 - - - - Disabled - - "ADC0: ADTRG0; AGT0: AGTIO0; IIC0: SDA0; RTC0: RTCOUT; SCI0: CTS0; SPI1: SSLB3" - None - - 
      P408 11 - - - - Disabled - - "CTSU0: TS04; GPT_OPS0: GTOWLO; GPT5: GTIOC5B; ICU0: IRQ07; IIC0: SCL0; SCI1: CTS1; SCI3: RXD3; SCI3: SCL3" - None - - 
      P409 10 - - - - Disabled - - "CTSU0: TS05; GPT_OPS0: GTOWUP; GPT5: GTIOC5A; ICU0: IRQ06; SCI3: SDA3; SCI3: TXD3" - None - - 
      P500 37 - - - - Disabled - - "GPT_OPS0: GTIU; GPT2: GTIOC2A" - None - - 
      RES# 19 SYSTEM0_RES - - - - - - - - IO "Read only" - 
      VCC 9 SYSTEM0_VCC - - - - - - - - IO "Read only" - 
      VCC 30 SYSTEM0_VCC - - - - - - - - IO "Read only" - 
      VCCDCDC 15 SYSTEM0_VCC_DCDC - - - - - - - - IO "Read only" - 
      VCL 3 SYSTEM0_VCL - - - - - - - - IO "Read only" - 
      VLO 14 SYSTEM0_VLO - - - - - - - - IO "Read only" - 
      VSS 6 SYSTEM0_VSS - - - - - - - - IO "Read only" - 
      VSS 31 SYSTEM0_VSS - - - - - - - - IO "Read only" - 
      VSSDCDC 13 SYSTEM0_VSS_DCDC - - - - - - - - IO "Read only" - 
    
  User Events
    
  User Event Links
    
  Module "I/O Port (r_ioport)"
    Parameter Checking: Default (BSP)
    
  Module "UART (r_sci_uart)"
    Parameter Checking: Default (BSP)
    FIFO Support: Disable
    DTC Support: Disable
    Flow Control Support: Disable
    RS-485 Support: Disable
    IrDA Support: Disabled
    
  Module "Realtime Clock (r_rtc)"
    Parameter Checking: Default (BSP)
    Set Source Clock in Open: Enabled
    
  HAL
    Instance "g_ioport I/O Port (r_ioport)"
      Name: g_ioport
      1st Port ELC Trigger Source: Disabled
      2nd Port ELC Trigger Source: Disabled
      3rd Port ELC Trigger Source: Disabled
      4th Port ELC Trigger Source: Disabled
      Pin Configuration Name: g_bsp_pin_cfg
      
    Instance "g_uart9 UART (r_sci_uart)"
      General: Name: g_uart9
      General: Channel: 9
      General: Data Bits: 8bits
      General: Parity: None
      General: Stop Bits: 1bit
      Baud: Baud Rate: 115200
      Baud: Baud Rate Modulation: Disabled
      Baud: Max Error (%): 5
      Flow Control: CTS/RTS Selection: Hardware RTS
      Flow Control: Software RTS Port: Disabled
      Flow Control: Software RTS Pin: Disabled
      Extra: Clock Source: Internal Clock
      Extra: Start bit detection: Falling Edge
      Extra: Noise Filter: Disable
      Extra: Receive FIFO Trigger Level: Max
      Extra: IrDA: Enable: Disabled
      Extra: IrDA: RXD Polarity Switching: Normal
      Extra: IrDA: TXD Polarity Switching: Normal
      Extra: RS-485: DE Pin: Disable
      Extra: RS-485: DE Pin Polarity: Active High
      Extra: RS-485: DE Port Number: Disabled
      Extra: RS-485: DE Pin Number: Disabled
      Interrupts: Callback: debug_uart9_callback
      Interrupts: Receive Interrupt Priority: Priority 2
      Interrupts: Transmit Data Empty Interrupt Priority: Priority 2
      Interrupts: Transmit End Interrupt Priority: Priority 2
      Interrupts: Error Interrupt Priority: Priority 2
      
    Instance "g_rtc0 Realtime Clock (r_rtc)"
      Name: g_rtc0
      Clock Source: Sub-Clock
      Frequency Comparision Value (LOCO): 255
      Automatic Adjustment Mode: Enabled
      Automatic Adjustment Period: 10 Seconds
      Adjustment Type (Plus-Minus): NONE
      Error Adjustment Value: 0
      Callback: rtc_callback
      Alarm Interrupt Priority: Priority 2
      Period Interrupt Priority: Priority 2
      Carry Interrupt Priority: Priority 2
      
